Design Guidelines for JFET Audio Preamplifier Circuits

Design Guidelines for JFET Audio Preamplifier Circuits

By Mike Martell

N1HFX

The Junction Field Effect Transistor (JFET) offers very high input impedance along with very low noise figures. It is very suitable for extremely low level audio applications as in audio preamplifiers. The JFET is more expensive than conventional bipolar transistors but offers superior overall performance. Unlike bipolar transistors, current can flow through the drain and source in any direction equally. Often the drain and source can be reversed in a circuit with almost no effect on circuit operation.

Transconductance The ability of a JFET to amplify is described as trans-conductance and is merely the change in drain current divided by the change in gate voltage. It is indicated as Mhos or Siemens and is typically 2.5mmhos to 7.5mmhos for the MPF102 transistor. Because of the high input impedance, the gate is considered an open circuit and draws no power from the source. Although voltage gain appears low in a JFET, power gain is almost infinite. Drain Characteristics Even though no voltage appears at the gate, a substantial amount of current will flow from the drain to the source. In fact, the JFET does not actually turn off until the gate goes several volts negative. This zero gate voltage current through the drain to the source is how the bias is set in the JFET. Resistor R3, which is listed in the above diagram, merely sets the input impedance and insures zero volts appears across the gate with no signal. Resistor R3 does almost nothing for the actual biasing voltages of the circuit. When the gate voltage goes positive, drain current will increase until the minimum drain to source resistance is obtained and is indicated below:Minimum Rds(on) or On State Resistance The above value can be determined by reading specification sheets for the selected transistor. In cases where it is not known, it is safe to assume it is zero. The other important characteristic is the absolute maximum drain current. Listed below are absolute maximum drain currents for some common N-channel transistors: MPF102 - 20ma 2N3819 - 22ma 2N4416 - 15ma When designing a JFET circuit, it is highly recommended to prevent the absolute maximum current from being exceeded under any conditions. In design calculations. never use more than 75% of the maximum drain current as specified by the manufacturer. JFET Design Example 1 For the first design example, we will use an MPF102 transistor with a Vcc of 12 volts. We will allow no more than 5 ma of drain current under any circumstances. For resistor R3, the gate resistor, we will use 1 Meg for a very high impedance across the gate. The gate resistor is normally anywhere from 1 Meg to 100K. The higher values allow the JFET to amplify very weak signals but require measures to prevent oscillations. The lower values enhance stability but tend to decrease gain. Sometimes the value of this resistor needs to be adjusted for impedance matching depending on the type of signal source involved. Because we will only allow 5 ma of current through the drain to source, we will calculate the total resistance for resistors R1 and R2. We will assume the Minimum Rds(on) to be zero. Vcc = 12 Minimum Rds(on) = 0 Ids = 5 ma (Vcc - (Minimum Rds(on) * Ids)) / Ids = Total Resistance of R1 and R2 (12 - (0 * .005) ) / .005 = 2400 ohms To calculate R2, we must select the desired voltage drop across this resistor. it is normally set between 20 to 30% of Vcc. For this example we will set R2 to 25% of the supply voltage (minus any voltage dropped across the drain and source) as follows: R2 = .25 * Total Resistance of R1 and R2 R2 = .25 * 2400 = 600 ohms (nearest standard value is 560 ohms) R2 = 560 ohms R1 can now be easily calculated by subtracting R2 from the total resistance as follows:

R1 = Total Resistance - R2 R1 = 2400 - 600 = 1800 ohmsTo prevent oscillations a 10 ohm resistor and a 100uf capacitor were added to isolate the circuit from the power supply. A .1uf capacitor was used for input coupling and a 4.7uf capacitor was used for output coupling. Slightly larger or smaller capacitor values will also give acceptable results. The optional 4.7uf capacitor which bypasses R2 is used to obtain the maximum amount of gain the transistor will deliver. The addition of this capacitor may introduce a small amount of unwanted white noise and should only be used when an absolutely quiet preamplifier is not required.

JFET Design Example 2 In the second design example, we will use an MPF102 transistor to add an additional stage of amplification to our circuit. We will make the following assumptions: R3 = 1Meg Vcc = 12 Minimum Rds(on) = 0 Ids = 7ma (Vcc - (Minimum Rds(on) * Ids)) / Ids = Total resistance of R1 and R2 (12 - (0 * .007)) / .007 = 1714 ohms We will assume R2 to have 25% of the supply voltage.

R2 = .25 * Total of R1 and R2 R2 = .25 * 1714 = 429 ohms (use 470) R2 = 470 R1 = Total Resistance - R2 R1 = 1714 - 429 = 1285 ohms (use 1200) R1 = 1200 ohms A 4.7uf capacitor was used for input coupling and a 10uf capacitor was used for output coupling. Slightly larger or smaller capacitor values will also give acceptable results. The optional 10uf capacitor which bypasses R2 is used to obtain the maximum amount of gain the transistor will deliver.

By putting our two circuits together we now have a two transistor JFET audio preamplifier with excellent gain and very low distortion. A 10K level control was added to complete the preamplifier circuit. If you decide to use a 2N3819 be aware that the pin-out is different than other JFET transistors